1. Field of the Invention
This invention relates to a method and structure which permits measurement to be taken of individual circuits and/or circuit components of an integrated circuit which could otherwise not be individually measured when connected within the integrated circuit.
2. Brief Description of the Prior Art
It is often desirable to test individual circuit portions and/or individual components of an integrated circuit prior to completion of fabrication. Such testing can avoid completion of fabrication of devices which already have a defect, thereby providing an economic saving and removing potentially inferior or non-working devices from the line. This type of testing has importance and several solutions have been provided by the prior art.
For example, in one prior art procedure as shown in FIG. 1, in order to improve the safe operating area (SOA) of a power transistor, a clamp in the form of a diode stack having a standard diode and a zener diode in back to back relation is placed across the gate and drain of the transistor. The diode stack will break down prior to the breakdown of the power transistor. This places the transistor in a forward biased SOA which is much stronger than placing the transistor in a reverse biased SOA (RBSOA). A problem with this arrangement is that, if the breakdown voltage of the stack is close to or above that of the transistor, the transistor may go into an RBSOA mode and will break down first with the stack having essentially no effect. It is therefore apparent that, in order for such an arrangement to be successful, it is imperative that the breakdown voltage of the transistor be much greater than the breakdown voltage of the diode stack. However, there is no good way to determine that this relation exists, so it cannot be accurately determined upon testing whether a breakdown is being caused by the diode stack or the power transistor. Disadvantage of this type of arrangement are that (1) the BV.sub.dss of the transistor cannot be tested, (2) the BV.sub.dss of the transistor cannot be distinguished from the BV of the diode stack, (3) leakage in the transistor cannot be distinguished from leakage in the diode stack and (4) the unclamped energy capability of the transistor cannot be tested because the BV of the diode stack is less than BV.sub.dss.
In a second prior art arrangement as shown in FIG. 2, the diode stack and the transistor are separated from each other at the output by providing a split bond pad having two separated sections, one section attached to the diode stack and the other section attached to the transistor. In this way, testing of the stack can take place separately at probe with the split bond pad later being connected together during bonding by having the bond extend across both bond pad sections. Problems that arise with this procedure are that the bond pad must be large, thereby decreasing the number of components that can be placed in a given area, there is an inefficient use of high current bonding since only half of the bond area is used for high current switching, there is the possibility of contaminant ingress due to the nitride opening at the bond pad metal edge of the field oxide and there is the possibility that an undesirable hump may be formed during the bonding procedure rather than a conformal bond to the pads.